An IC is a device that includes numerous electronic components (e.g., transistors, resistors, diodes, etc.) that are embedded typically on the same substrate, such as a single piece of semiconductor wafer. These components are connected with one or more layers of wiring to form multiple circuits, such as Boolean gates, memory cells, arithmetic units, controllers, decoders, etc. An IC is often packaged as a single IC chip in one IC package, although some IC chip packages can include multiple pieces of substrate or wafer.
A configurable IC is an integrated circuit (IC) that has configurable circuits. A configurable circuit receives a configuration data set that specifies the operation that the configurable circuit has to perform within the set of operations it is capable of performing. In some embodiments, the IC is a reconfigurable IC, meaning that the reconfigurable IC may receive and react to configuration data on a sub-cycle basis. In some embodiments, configuration data is generated outside of the configurable IC. In these embodiments, a set of software tools typically converts a high-level IC design (e.g., a hardware description language design) into a set of configuration data bits that can configure the configurable IC (or more accurately, the configurable IC's configurable circuits) to implement the IC design.
Configurable integrated circuits (ICs) require a method by which configuration data stored within random access memory (RAM) is retrieved from the RAM and supplied to the proper configurable circuits of the IC. In some embodiments, the RAM is static random access memory (SRAM). Usually, one set of configuration data is used for each configurable circuit. Run-time reconfigurable circuits are configurable circuits that can cycle through multiple configuration data sets during run-time. For such reconfigurable circuits, it's beneficial to be able to efficiently retrieve, decode and synchronize configuration data.
Typically, configurable ICs utilize a dual ported RAM that allows for reads and writes to occur through separate ports of the RAM. Alternatively, the dual ported RAM can be used to provide configuration data at odd cycles of a clock on one port and alternatively provide configuration data at even cycles on a different port. Such use of the dual ported RAM introduces additional circuit complexity, such as multiplexers and configuration values to control the multiplexer in alternatively switching between the odd and even cycles.
Furthermore, typical configurable ICs include sense amplifiers and latches in conjunction with the dual ported RAM to capture the read data and stabilize the data from the RAM before supplying the configuration data to the proper configurable circuits. However, to do so, the sense amplifiers require some type of clock signal or timing signal to coincide with the capturing of the read data from the RAM. A register coupled to the sense amplifier captures the data allowing the next read to occur while new data is output from the RAM.
Attempts to reduce the size of such configuration data supplying circuitry include tradeoffs that ultimately have yielded minimal performance gain in either configuration setup time or resources used. As an example, the size of the RAM cell itself may be reduced to allow greater density of RAM cells on the configurable IC.
Therefore, a need exists to simplify the overall circuit complexity for reading, decoding, synchronizing, and storing configuration data. Such a circuit should optimally store configuration data and optimally supply such data to the configurable logic of the IC, while leaving a minimal footprint on the overall IC design and using minimal power.